The invention relates to a data bus for a plurality of nodes which are connected to one another. A data bus of this type is known from the German Patent Application 19720401 not previously published. A concrete specification concerning the circuit-technological layout of the data bus is not contained therein.
A circuit-technological realization of a data bus of this type is known in the form of an open collector circuit. An open collector circuit has the disadvantage, that at high rates of transmission and with many bus nodes, a relatively small resistance value must be used as collector resistance in order to achieve a sufficient steepness of the edge of the information signals present in pulse form. This leads to high currents and the necessity of the use of power transistors and power resistors as well as high power losses.
An additional problem follows when some of the nodes supply optical signals. In particular, in the case of a large number of bus nodes, a signal amplification is required in order to provide all the nodes with signals of sufficient quality. This presents the possibility of converting the signal into electric form, amplifying them, and reconverting them into optical form, with the two-time conversion having additional amplification, signal, distortions, occur, which reduce the degree of efficiency of the data bus.
The objective of the invention is to provide a data bus of the which makes possible interference-free bus communication with low circuit-technological expenditure even in the case of a large number of bus nodes.
The central element of the data bus according to the invention is the logical decision gate to whose inputs the signal outputs of the bus nodes are fed. The logical decision gate requires no expensive signal form processing devices. It transmits the signals unchanged in form. Also the required power consumption is low even in the case of a large number of nodes.
Developments of the invention are possible with nodes which supply electrical output signals as well as with nodes which generate optical output signals. The latter nodes are connected via opto-electric transducers in such a way on the data bus that the signal outputs of the nodes via each transducer of this type are fed to the logical decision gate and the output of the logical decision gate is fed via a common electric-optical transducer or by individual transducers of to the inputs of the nodes.
For a data bus which is configured as an open collector circuit known signal form processing devices such as disclosed in U.S. Pat. No. 5,684,831 are used. A device of this type is provided for each node. The configuration according to the invention for the data bus with a logical decision gate now permits reducing the circuit-technological expenditure drastically. The only requirement is to dispose a single signal preparation circuit between the logical decision gate and the inputs of the nodes. The signal preparation circuit models the pulse forms of the output signal of the logical decision gate.
This modeling can be an adjustment of the form of the output signal to the form of the input signals or an adaptation as is described in U.S. Pat. No. 5,684,831. Therein the leading edges are flattened in order to be able to distinguish the usable signal from high-frequency interference signals with extreme edge steepness.
Finally, according to additional embodiments of the invention, additional logical decision gates can be disposed between the output of the signal preparation circuit and at least one of the nodes. Thereby it is possible to separate certain sections of the data bus as needed in order, for example, to separate a faulty bus node or else to set several bus nodes into Sleep mode.
Other objects, advantages and novel features of the present invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings.